In general, in both DIP (dual-in-line package) and plastic leaded chip carriers (PLCC or Quad), solder plating using electrical deposition techniques have been employed to plate a thin layer of solder, typically 60% tin and 40% lead. However, it has been difficult to obtain uniform deposits over the entire surface of the multiple leads extending from the plastic package. This is particularly so with respect to so-called J-leads, which extend from a midpoint of the four sides of a Quad package and are bent downwardly around the package bottom edge and extend inward to form the bottom of the J. The curved bottom hereinafter is called the lead "crest". Further in solder plating, it is very difficult to control the solder composition being plated over the entire surface of the multiple leads resulting in nominal 60-40 (Sn-Pb) solder having areas of 85% Sn-15% Pb or 80% Sn-20% Pb for example.
A nonuniform thickness of the solder layer at a J-lead crest results in an unreliable joint between that lead when it is to be solder mounted directly on copper traces or conductive pads of a printed circuit board, or the like, in so-called surface-mounted technology. This occurs when an "over thick" layer at one lead crest creates a high point on the desired plane of lead crests forming the overall package, for example. "Under thick" crests, or indeed layers of correct thickness, thus, do not make good contact with its trace. It is critical that the bottom surface of the crests of all leads, for example the 84 leads in a typical Quad package, are substantially all in the same plane. In addition, excess solder can cause bridging upon board mounting.
Due to the above nonuniform thickness and nonuniform composition problems in solder plating and the difficulties of controlling thickness and composition, one of the world's largest user of these devices (IBM) has specified that a solder dip process be utilized for coating solder on integrated circuit package leads since it was believed that a better, more reliable solder joint between the lead and a solder pad on the printed circuit board would result. Effort has been made to utilize a so-called wave soldering machine in placing a solder coating on J or other type leads by a dip process. In such a machine, a holder of integrated circuit packages, all in a single file end-to-end, is conveyed through a fluxer station, a preheater station and the wave solder station. The wave solder station contains a solder pot, a pump and a nozzle which forms the actual wave of solder through which the holder is passed. Wave soldering machines may be horizontal or inclined, the latter where the conveyor rides up an incline from the flux station to the preheater station to the wave soldering station.
As is known in the field, oil intermix (U.S. Pat. No. 3,098,441) may be used in wave soldering to inhibit dross (oxides of Sn and Pb) formation. It is known that the intermixed oil aids in the post-soldering removal of corrosion causing flux residues. The conventional solder coat process in the past has been to dip or pass the overall package through a solder wave in a leads down orientation.
End users mount and reflow the packages with the resultant dipped solder coated leads onto a board by conveying the chip carriers though a vapor blanket utilizing vaporized FC-70 Fluorinert liquid (3M Co.). Since the melting point of 60Sn-40Pb solder is 185.degree. C., a vapor phase zone of FC-70 at 216.degree. C. is appropriate.